SynUTC - Project Outline
Research Tasks
Ulrich Schmid, Dietmar Loy.
FWF Projektantrag SynUTC - Synchronized UTC for Distributed Real-Time
Systems,
TR 183/1-39 (in German), Technische Universität Wien,
Dept. of Automation, December 1993.
During the past few years, much research has been conducted towards a
mutually consistent view of time in fault-tolerant distributed
systems so that the problem of internal synchronization,
i.e., keeping local clocks within well-defined bounds of each other,
is relatively well understood. The nature of the problem, however,
radically changes when the requirement of a mutually consistent
global time is extended with a global time that also relates to some
external time standard like UTC. Thus, as observed by prominent
researchers like F.Cristian, the problem of fault-tolerant external
synchronization constitutes a research topic in its own right.
Taking into account that real-time systems are becoming more and more
prevalent in our daily life, e.g., as integral part of more general
information processing systems, where UTC is the only common (and
official legal!) notion of time, it is obvious that systems employing
their own idea of time might be of questionable use for future
plications. Promising sources of UTC are readily available now,
most notably the NAVSTAR Global Position System (GPS). Consequently,
we felt that it is high time to focus on the problem of how to provide
a global time accurately synchronized to UTC for large-scale, fault-tolerant,
distributed real-time systems.
In our project SynUTC, we are primarily exploiting the promising features
of our novel clock validation technique that solves the problem of
fault-tolerant external synchronization. The underlying idea is to
validate time information of external time sources like GPS-receivers
against a global time maintained by the local clocks in the system. The
mainstreams of our work are:
- Development of an ``engineered'' implementation of a particularily
promising clock synchronization algorithm.
- Providing a full (average case, worst case)
analysis of our algorithm's behavior
relying on a realistic failure model.
- Systematic exploration of our algorithms under different environmental
conditions by means of simulation.
- Development of an ASIC, called
UTCSU, to support our algorithm by hardware.
- Planning of an experimental performance evaluation testbed
comprising M68030 VMEbus-CPUs equipped with a 802.3 network coprocessor
and our MA-Module NTI.
- Investigation of availability and failures of
GPS-receivers with respect to our failure model.
